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PROPLUS WAS INVITED TO CADENCE TECHNOLOGY-ON-TOUR AT TAIWAN 2008
The Cadence Technology-on-Tour seminar (ToT) was held in Hsinchu, Taiwan on July 22, 2008.
It had attracted more than 300 attendees from local and overseas companies including IC design houses,
foundries, system and package houses, and IDMs. ToT is a global series of technical roadshow
where Cadence technology users and other industry experts can network and exchange ideas.
Dr. James Ma, CEO of ProPlus Design Solutions Inc., was invited to give a technical overview
talk on the High-voltage MOSFET Device Modeling and Simulation in which he covered the Cadence
proprietary models HVMOS/LDMOS, public model HiSIM_HV and macro modeling approach.
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